The present invention relates to a digital broadcast receiver for receiving a digital broadcast signal in which a compressed video signal, a compressed audio signal, and a data signal in association with the compressed video and audio signals are multiplexed, as well as a CPU and a decoder used for the digital broadcast.
FIG. 9 shows a typical configuration of a conventional digital broadcast receiver for receiving digitally compressed digital broadcast that is defined by the ISO/IEC 13818 standard and usually abbreviated as MPEG2.
The digital broadcast receiver shown in the figure comprises a tuner/FEC (Forward Error Correctioner) 10, an antenna 11, a demultiplexer 20, a CPU 30, a memory 40, a decoder buffer 50, a video decoder 60, data selectors 70 and 90, an audio decoder 80, a CPU interface 100, a display 110, a speaker 120, and a data bus 130.
The electric waves of digital broadcast received by the antenna 11 are amplified and detected by a tuner in the tuner/FEC 10, and then subjected to FEC (Forward Error Correction), so that the electric waves of the digital broadcast are converted into a digital signal. The digital signal is sent to the demultiplexer 20. The demultiplexer 20 separates a digital broadcast signal obtained from the tuner/FEC 10, in which signal a compressed video signal, a compressed audio signal, and a data signal are multiplexed, to supply the compressed video signal and the compressed audio signal to the decoder buffer 50 and supply the data signal to the memory 40 via the data bus 130.
The decoder buffer 50 retains the compressed video signal and the compressed audio signal. The video decoder 60 reads the compressed video signal from the decoder buffer 50, decodes the signal according to a PTS (Presentation Time Stamp), and sends the result of signal decoding to the selector 70. The audio decoder 80 reads the compressed audio signal from the decoder buffer 50, decodes the signal according to a PTS, and sends the result of signal decoding to the selector 90. The memory 40 accumulates the data signal mentioned above, and also stores programs to be executed by the CPU 30, which will be described below. The CPU 30 executes, by time division, a plurality of programs such as a data decoder 42, an OSD (On Screen Display) 43, a system control 44, and the like extracted to an execution program area 41 of the memory 40, and accordingly supplies a data signal to the data bus 130, which will be described later. The data decoder 42 analyzes the header portion of the data signal, and decodes the data signal according to the type of data indicated in the header portion of the data signal. The OSD 43 performs calculations for image rendering necessary for OSD display. The system control 44 controls the entire digital broadcast receiver.
The CPU interface 100 obtains from the data bus 130 a video signal and an audio signal decoded by the data decoder 42, a program executed by the CPU 30. The CPU interface 100 then supplies the video signal and the audio signal to the selector 70 or the selector 90 according to the signal type obtained, and sends a control signal to the selector 70 or the selector 90. According to the control signal from the CPU 30, the selector 70 selects the output of the video decoder 60 when broadcast, the main signal, is to be outputted, and selects the video signal supplied from the CPU interface 100 and supplies the video signal to the display 110, which will be described below, when the video signal included in the data signal is to be outputted. According to the control signal from the CPU 30, the selector 90 selects the output of the audio decoder 80 when broadcast, the main signal, is to be outputted, and selects the audio signal supplied from the CPU interface 100 and supplies the audio signal to the speaker 120, which will be described below, when the audio signal included in the data signal is to be outputted. The display 110 displays the video signal supplied from the selector 70. The speaker 120 outputs the audio signal supplied from the selector 90. The data bus 130 is a path for transmitting the data signal processed by the CPU 30 to each part in the digital broadcast receiver.
According to the configuration described above, if a data signal is multiplexed in a digital broadcast signal, a display and an audio output can be obtained by subjecting the data signal to software decoding by the data decoder 42.
Incidentally, there is disclosed in Japanese Patent Laid-open No. Hei 07-264562 an example of a digital broadcast receiver that decodes a digital broadcast signal in which a compressed video signal, a compressed audio signal, and an accompanying data signal are multiplexed.
As digital compression technology has been improved, the proportion of a transmission line for digital broadcast occupied by a compressed video/audio signal has been reduced. Thus, it has been possible to transmit a greater amount of data signal.
Therefore, it has been possible to transmit not only conventional data, which is mostly text data, but also video and audio data such as video clips and effect sound. As a result, more various data can be transmitted.
When video and audio data for digital broadcast is to be transmitted, it is possible to transmit the data without compressing it. However, more data can be transmitted if the data is compressed, as is a video and audio signal for digital broadcast, and transmitted as a data signal.
Now, in a conventional digital broadcast receiver as shown in FIG. 9, all of the data signal is decoded by a data decoder 42. Thus, after analyzing the data signal, the data decoder 42 needs to decode the data signal in the same manner as a video decoder 60 and an audio decoder 80 do even if the data transmitted is compressed by the same method as that used for a compressed video signal or a compressed audio signal multiplexed in digital broadcast. In addition, in cases where a compressed still image is transmitted, it is more efficient if the video decoder decodes it as a compressed video signal.
Moreover, as digital compression technology has been improved, the process of decoding a compressed video signal or a compressed audio signal has become more complex, and therefore the processing load on a CPU 30 when the data decoder 42 is used has been increased. Since the CPU 30 executes, by time division, other programs such as OSD 43 and system control 44, the increase in the processing load on the data decoder 42 affects the operation of the entire digital broadcast receiver. Specific examples of the operation affected include image rendering by the OSD 43. When the decoding of a data signal is started, the priority of the image rendering process of the OSD 43 is lowered, and therefore it will take more time for switching in the OSD screen than before. For example, if data broadcast is selected from a menu displayed by the OSD, the operation of the OSD becomes slower on starting the decoding of the data signal. Thus, this problem greatly affects the user.
In the meantime, the results of signal decoding by the video decoder 60 and the audio decoder 80 are not selected at selectors 70 and 90 respectively during the decoding of the data signal. Therefore, decoding is performed but the result of decoding is not outputted.
Thus, when a compressed video signal or a compressed audio signal included in a data signal is to be decoded and outputted, the load on the CPU 30 becomes heavier, while the results of decoding by the video decoder 60 and the audio decoder 80 are not outputted. Therefore, the efficiency of utilization in the entire digital broadcast receiver is poor.
An object of the present invention is to provide a digital broadcast receiver that makes it possible in decoding a data signal to relieve the increasing processing load on the CPU, which increase results when a compressed video signal and a compressed audio signal are decoded, and to provide a CPU and a decoder used for this object.
According to the present invention, there is provided a digital broadcast receiver comprising: a demultiplexer for separating a digital broadcast signal in which a compressed video signal, a compressed audio signal, and a data signal in association with the compressed video and audio signals are multiplexed; a decoder buffer for storing the compressed video signal and the compressed audio signal separated by the demultiplexer; a video decoder for decoding the compressed video signal in the decoder buffer; an audio decoder for decoding the compressed audio signal in the decoder buffer; a memory for storing the data signal separated by the demultiplexer; and a CPU for analyzing the data signal stored in the memory; wherein the CPU allows the data signal analyzed by the CPU to be stored in the decoder buffer when the analyzed data signal includes a compressed video signal or a compressed audio signal and the compression method used for the compressed video signal or the compressed audio signal is the same as that used for the compressed video signal or the compressed audio signal multiplexed in the digital broadcast signal.
In addition, according to the present invention, the decoder buffer possesses, by time division, the compressed video signal and the compressed audio signal separated by the demultiplexer as well as the compressed video signal and the compressed audio signal included in the data signal, and uses each of the signals in an exclusive manner.
Moreover, according to the present invention, the video decoder and the audio decoder retain a write address used when the compressed video signal and the compressed audio signal included in the data signal are stored in the decoder buffer, and from the difference between the write address and a read address for the video decoder and the audio decoder to read the decoder buffer, senses whether the compressed video signal and the compressed audio signal accumulated in the decoder buffer are depleted or not, or senses the progress of decoding, whereby the video decoder and the audio decoder stop, resume, or repeat decoding.
According to the present invention, the processing load on the CPU can be reduced because the compressed video signal and the compressed audio signal included in the data signal are decoded not by using software, but by using the video decoder and the audio decoder which are already provided to decode the main broadcast.
Furthermore, a reduced CPU processing load makes it possible not only to improve the processing speed of conventional functions and reduce the cost of the CPU but also to add new processing functions. For example, the receiver may be provided with a communication function and the communication function may be performed by software processing by the CPU when data signals are to be obtained not only from the demultiplexer but also from a network such as the Internet. As a result, a reduction in the number of external parts and other effects can be obtained.